SONOS memory devices are electrically erasable programmable memory transistors wherein charge is stored in a nitride trap layer that is insulated from a substrate on one side and insulated from a select gate on another side. For example, such devices are described in “Characterization of Scaled SONOS EEPROM Memory Devices for Space and Military Systems” by M. White et al., IEEE 2004 p. 51-59. This paper describes device parameters, including retention time, in terms of various physical properties of devices. In NMOS SONOS cells an N-channel is formed in a P-well with the majority charge carriers being electrons. Charge is moved into nitride traps in the trap layer by various charge transfer mechanisms, such as hot electron transfer or Fowler-Nordheim (“FN”) tunnelling. Similarly, in PMOS SONOS cells a P-channel is formed in an N-well with the majority charge carriers being holes. The nitride traps are less vulnerable to charge leakage due to insulator failure than conventional floating gates because traps that are spatially localized are employed. Thus, a local failure of nearby insulator material may affect some traps but not all traps.
SONOS memory devices have good charge retention over a period of time for the reason mentioned. Charge loss can occur because a relatively thin bottom oxide is required for reasonable programming times. Charge loss can be accommodated by simply making the initial programmed threshold high enough so that after some period of time, say 10 years, the threshold remains high enough that the cell is still programmed. But even with good charge retention, there is some degradation of threshold voltages such that separation of characteristic threshold voltages is not so great after a number of years compared to the time of manufacture, leading to read errors. This creates a smaller window for a read voltage that must be within the window defined by the two threshold voltages. Once the read voltage is outside of the window, the transistor is no longer useful because of read errors unless the read voltage is somewhat adjusted or re-positioned within the window.
An object of the invention is to devise a SONOS memory device having improved read disturb characteristics that reduce read errors over a long period of time.